Non-volatile Latch Using Magneto-Electric and Ferro-Electric Tunnel Junctions

Two memory structures under development in the Nanoelectronics Research Initiative (NRI) of the Semiconductor Research Corporation (SRC) show promise for low power, small area, high performance non-volatile memory devices. However, these will not operate in conjunction with conventional CMOS directly. This invention describes circuit configurations that allow such interfacing.

6933










Patent Information: